1. Field of the Invention
The embodiments described herein are directed to virtual ground array memory structures, and more particularly to a virtual ground array structure that uses inversion bit lines in place of the conventional implanted bit lines.
2. Background of the Invention
It is well known to use virtual ground array designs in order to reduce the cell size for non-volatile memory products, such as flash memory products. While virtual ground structures have allowed reduction in the overall cell size in a virtual ground array, the achievable cell size reductions are still limited. As new applications call for ever smaller packaging and increased densities, further reductions in cell size are highly desirable.
One limitation in cell size reduction for conventional virtual ground structures, for example, is the need for implanted bit lines. The inclusion of the implanted bit lines requires a certain area for each cell. If the need for the implanted bit lines is eliminated, then the cell size can be reduced; however, conventional virtual ground array structures require the implanted bit lines.